Embodiments of the present disclosure relate to a power semiconductor device and a snubber circuit thereof, and more particularly to a power semiconductor device and a snubber circuit for balancing voltage among series-connected switching devices.
In high voltage applications, serialization with low voltage devices instead of using high voltage devices is a good solution for low cost. However, voltage balance of each serialized power semiconductor device is a big problem. Such blocking voltage unbalance among serialized devices may cause some devices holding much higher blocking voltage than the others and may greatly increase the failure rate of devices. The voltage unbalance is mainly caused by propagation delay mismatch of gating signals and the performance variation among serialized devices. These factors may also vary with component manufacturing, temperature, aging etc. To attenuate the effect, a conventional snubber circuit providing with a capacitor for decreasing a voltage between both ends of each serialized power semiconductor device is commonly used to balance the voltage of serialized devices. However, the capacitance of the capacitor used in the conventional snubber circuit will decrease quite a lot when the voltage applied to the capacitor increases so that the capacitor must have a high breakdown voltage structure, such as combining with additional snubber capacitors with fixed big capacitance, which increases the cost and size.
Therefore, it would be desirable if a power semiconductor device and a snubber circuit could be provided to achieve a voltage balancing for power semiconductor device serialization at least with low cost and simple configuration.